1. Field of the Invention
This invention relates to a semiconductor pressure sensor for use in various control units.
2. Description of the Prior Art
A conventional semiconductor pressure sensor is shown in plan view in FIG. 3. The semiconductor pressure sensor comprises a rectangular diaphragm area 14 formed centrally on the (100) face of an n-type silicon semiconductor chip, four gauge resistances 5, 6, 7 and 8 arranged on one surface within the diaphragm area 14 which are formed at respective median portions of individual sides of the diaphragm area 14, and low resistance link resistances 9, 10, 11, 12, and 13 which electrically interconnect the gauge resistances 5, 6, 7 and 8, the link resistances 9, 10, 11, 12 and 13 forming a bridge circuit in conjunction with the gauge resistances 5, 6, 7 and 8.
The link resistance 9 is electrically connected to the gauge resistances 5 and 6, and is partially formed with a bonding pad 1 for external biasing. A bonding pad 2 is connected to the link resistances 11 and 12 which are connected respectively to the gauge resistances 7 and 8. A lead-out resistance 10a is connected to the link resistance 10 which is electrically connected to the gauge resistances 6 and 7, and an output bonding pad 3 is connected to the lead-out resistance 10a. Similarly, a lead-out resistance 13a is connected to the link resistance 13 which is electrically connected to the gauge resistances 5 and 8, and an output bonding pad 4 is connected to the lead-out resistance 13a.
FIGS. 4(a) to 4(d) are sections taken along the line A--A in FIG. 3, which illustrate the process for producing a semiconductor pressure sensor of the above mentioned type. Such semiconductor pressure sensors are produced according to the following procedure. A silicon oxide film 21 is first formed on an n-type silicon semiconductor base 20 by thermal oxidation (FIG. 4(a)), and a resist (not shown) is placed over the silicon oxide film 21. Then, portions of the oxide film 21 and of the resist in which link resistances 9 to 13 are to be formed are removed by photolithoghography and etching. Next, boron ions of high concentration are implanted using the resist as a mask and then the resist is removed (FIG. 4(a)).
Again, a resist 22 (FIG. 4(b)) is formed all over the semiconductor base 20, and portions of the resist 22 and of the oxide film 21 in which gauge resistances 5 to 8 are to be formed are removed by photolithoghography and etching. Boron ions of low concentration are then implanted using the resist 22 as a mask (FIG. 4(b)). Subsequently, the semiconductor base is heated to thereby effect thermal diffusion of the boron ions in the link resistances 9 to 13 and gauge resistances 5 to 8.
Next, a silicon oxide film 23 (FIG. 4(c)) is deposited on the semiconductor base 20 all over using the CVD (chemical vapor deposition) technique. Again, portions of the oxide film 23 in which bonding pads 1 and 2 are to be formed are removed by photolithoghography and etching. Then, a film of aluminum metal is formed all over the semiconductor base 20, and bonding pads 1 and 2 are formed by photolithoghography and etching. The semiconductor base 20 is divided into chips, and a semiconductor pressure sensor as shown in FIG. 3 is thus obtained.
In the semiconductor pressure sensor of FIG. 3, when a certain external bias voltage is applied to the bonding pads 1, 2, current flows into the gauge resistances 5 to 8 and link resistances 9-13. In the case where no pressure is applied to the diaphragm area 14, the four gauge resistances 5 to 8 are of equal resistance value. When an external pressure is applied to the diaphragm area 14, some stress will develop in the diaphragm area 14. This stress has a piezoresistive effect such that the two pairs of gauge resistances 6, 8 and 5, 7 as components of a bridge circuit will have resistance values which are no longer equal, and as a result an output voltage corresponding to the pressure applied to the diaphragm area 14 develops across the bonding pads 3 and 4.
In such conventional semiconductor pressure sensors, as shown in FIG. 3, the diaphragm area 14 includes a residual area 15 in which none of the gauge resistances 5 to 8 or link resistances 9 to 13 are formed. The residual area 15 is centrally located in the diaphragm area 14 and covers a comparatively large area. As shown in FIG. 4(d), two silicon oxide film layers 21 and 23 are formed thicker in the residual area 15. The silicon and the silicon oxide film in the diaphragm area 14 have different coefficients of thermal expansion and, therefore, the presence of the residual area 15 having such spacious and thick silicon oxide film is a cause of internal stress (residual stress) development. This internal stress involves a problem such that when no external pressure to be measured is present, the voltage across the bonding pads 3 and 4, i.e., offset voltage, is not zero and is subject to large variation.